In the previous section, Maximum Power Transfer and Impedance Matching, we covered the consequences of transferring electrical power between one stage and another. But in many or even most cases, we’re more interested in transferring a signal between stages, not just raw power.
Signals are time-varying voltages or currrents. They often carry information that we’re interested in moving through our system.
In analog circuits, it’s important to consider the output impedance of the previous stage and the input impedance of the next if we are to successfully connect the two stages together.
If we follow the suggestions below, we can design and analyze the two stages independently. This happens because we can use Algebraic Approximations to show that one stage does not “load” (in this context, “load” means “burden”) another, allowing us to divide-and-conquer: a powerful engineering strategy for both design and analysis!
Signals are most often carried as voltages. That’s because we live in a world of finite resistances, and we’d like to keep power consumption low, and Ohm’s Law suggests we keep currents low to minimize resistive losses.
If we are trying to convey a signal from one stage to the next, then we can create a Thevenin equivalent circuit looking into the previous stage’s output, and another one looking into the next stage’s input. We then connect these two together. The previous stage’s output is our source and the next stage’s input is our load. We want to maximize the voltage transfer ratio to deliver as much signal as possible from source to load:
Exercise Click the circuit, click “Simulate,” and “Run DC Sweep” to see how the voltage delivered to the load varies as we adjust the load resistance. If you run the simulation, you’ll see clearly that the maximum voltage transfer occurs when .
This is a resistive voltage divider between the source resistance and the load resistance. The fraction of voltage received by the next stage is equal to:
which can be approximated by if . If we maintain a ratio of at least 100-to-1, we will maintain 99%+ voltage signal transfer.
If the source and load impedances are equal , we’ll lose half of the voltage signal just in connecting the two stages! Probably not what the designers intended.
To summarize: if a signal is being carried as a voltage, then ideally we’d like the previous stage to have a low output impedance (like an ideal voltage source), and we’d like the next stage to have a high input impedance . This will maximize the amount of signal that is transferred between stages, in the schematic above.
Sometimes, though less commonly, signals are carried as currents. (One reason to do so is that even though it costs more in power consumption, transmitting a signal as a current can be more robust to some types of noise and interference.)
In this case, our signal source (the previous stage’s output) can be modeled as a Norton equivalent circuit, like a non-ideal current source. (An ideal current source would have .) We can maximize the current transfer ratio from source to load:
Exercise Click the circuit, click “Simulate,” and “Run DC Sweep” to see how the voltage delivered to the load varies as we adjust the load resistance. If you run the simulation, you’ll see clearly that the maximum current transfer occurs when .
This is a current divider, and the current received by the load is equal to:
which can be approximated by if . (Note: this is the exact opposite of the voltage-as-signal case above!)
To summarize: if a signal is being carried as a current, then ideally we’d like the previous stage to have a high output impedance , and we’d like the next stage to have a low input impedance . This will maximize the amount of signal that is transferred between stages, in the schematic above.
Inside a circuit such as an amplifier, the loss of signal amplitude involved in coupling one stage to the next is often called interstage loading. In general, we want to minimize interstage loading because it causes us to lose some of our signal amplitude.
There are some active components that can help us minimize loading, such as a BJT emitter follower, or an op-amp voltage buffer, demonstrated here:
Exercise Click the circuit, click “Simulate,” and “Run Time-Domain Simulation.”
In this example, we’re using a single source V1 to drive three examples at once, so we can compare the loading effects side-by-side. Each one has an independent but equal source resistance , and each has its own load resistance .
Per the Voltage as Signal calculations above, we expect to lose about 90% of our signal amplitude because of the incompatible source and load impedances, and that’s what we see in the
V(out_loaded) trace. We’ve demonstrated two quick approaches to fixing this, and in both
V(out_opamp) you’ll see roughly the full signal amplitude! There is a different DC offset to the BJT emitter follower case, but that can be ignored for now.
There are tradeoffs to adding more parts to your circuit (including more power consumption, more added noise, and higher cost and complexity), but both of these approaches are commonly used ways to minimize interstage loading when needed – and it often is!
If you’ve designed and tested two amplifier stages A and B independently, and then find that they perform worse than expected when connected together A+B, you most likely have an interstage loading problem.
This effect can be even more subtle when connecting filters, which have frequency-dependent behavior. The cutoff frequencies of your filters can change unintentionally due to interstage loading. To fix it, you either need to design with the whole system in mind at once, or you need to make sure that the impedances are far enough away (as described above) that you can approximately ignore one stage when designing the next. The latter approach is easier and more robust, though not always possible.
Unsure whether to maximize signal transfer or power transfer? Review our Deciding What to Maximize discussion in the previous section.
In the next section, Dependent (Controlled) Sources, we’ll add several new types of voltage and current sources that are invaluable for modeling more complicated components.